Espressif Systems /ESP32 /LEDC /INT_CLR

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Interpret as INT_CLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HSTIMER0_OVF_INT_CLR)HSTIMER0_OVF_INT_CLR 0 (HSTIMER1_OVF_INT_CLR)HSTIMER1_OVF_INT_CLR 0 (HSTIMER2_OVF_INT_CLR)HSTIMER2_OVF_INT_CLR 0 (HSTIMER3_OVF_INT_CLR)HSTIMER3_OVF_INT_CLR 0 (LSTIMER0_OVF_INT_CLR)LSTIMER0_OVF_INT_CLR 0 (LSTIMER1_OVF_INT_CLR)LSTIMER1_OVF_INT_CLR 0 (LSTIMER2_OVF_INT_CLR)LSTIMER2_OVF_INT_CLR 0 (LSTIMER3_OVF_INT_CLR)LSTIMER3_OVF_INT_CLR 0 (DUTY_CHNG_END_HSCH0_INT_CLR)DUTY_CHNG_END_HSCH0_INT_CLR 0 (DUTY_CHNG_END_HSCH1_INT_CLR)DUTY_CHNG_END_HSCH1_INT_CLR 0 (DUTY_CHNG_END_HSCH2_INT_CLR)DUTY_CHNG_END_HSCH2_INT_CLR 0 (DUTY_CHNG_END_HSCH3_INT_CLR)DUTY_CHNG_END_HSCH3_INT_CLR 0 (DUTY_CHNG_END_HSCH4_INT_CLR)DUTY_CHNG_END_HSCH4_INT_CLR 0 (DUTY_CHNG_END_HSCH5_INT_CLR)DUTY_CHNG_END_HSCH5_INT_CLR 0 (DUTY_CHNG_END_HSCH6_INT_CLR)DUTY_CHNG_END_HSCH6_INT_CLR 0 (DUTY_CHNG_END_HSCH7_INT_CLR)DUTY_CHNG_END_HSCH7_INT_CLR 0 (DUTY_CHNG_END_LSCH0_INT_CLR)DUTY_CHNG_END_LSCH0_INT_CLR 0 (DUTY_CHNG_END_LSCH1_INT_CLR)DUTY_CHNG_END_LSCH1_INT_CLR 0 (DUTY_CHNG_END_LSCH2_INT_CLR)DUTY_CHNG_END_LSCH2_INT_CLR 0 (DUTY_CHNG_END_LSCH3_INT_CLR)DUTY_CHNG_END_LSCH3_INT_CLR 0 (DUTY_CHNG_END_LSCH4_INT_CLR)DUTY_CHNG_END_LSCH4_INT_CLR 0 (DUTY_CHNG_END_LSCH5_INT_CLR)DUTY_CHNG_END_LSCH5_INT_CLR 0 (DUTY_CHNG_END_LSCH6_INT_CLR)DUTY_CHNG_END_LSCH6_INT_CLR 0 (DUTY_CHNG_END_LSCH7_INT_CLR)DUTY_CHNG_END_LSCH7_INT_CLR

Fields

HSTIMER0_OVF_INT_CLR

Set this bit to clear high speed channel0 counter overflow interrupt.

HSTIMER1_OVF_INT_CLR

Set this bit to clear high speed channel1 counter overflow interrupt.

HSTIMER2_OVF_INT_CLR

Set this bit to clear high speed channel2 counter overflow interrupt.

HSTIMER3_OVF_INT_CLR

Set this bit to clear high speed channel3 counter overflow interrupt.

LSTIMER0_OVF_INT_CLR

Set this bit to clear low speed channel0 counter overflow interrupt.

LSTIMER1_OVF_INT_CLR

Set this bit to clear low speed channel1 counter overflow interrupt.

LSTIMER2_OVF_INT_CLR

Set this bit to clear low speed channel2 counter overflow interrupt.

LSTIMER3_OVF_INT_CLR

Set this bit to clear low speed channel3 counter overflow interrupt.

DUTY_CHNG_END_HSCH0_INT_CLR

Set this bit to clear high speed channel 0 duty change done interrupt.

DUTY_CHNG_END_HSCH1_INT_CLR

Set this bit to clear high speed channel 1 duty change done interrupt.

DUTY_CHNG_END_HSCH2_INT_CLR

Set this bit to clear high speed channel 2 duty change done interrupt.

DUTY_CHNG_END_HSCH3_INT_CLR

Set this bit to clear high speed channel 3 duty change done interrupt.

DUTY_CHNG_END_HSCH4_INT_CLR

Set this bit to clear high speed channel 4 duty change done interrupt.

DUTY_CHNG_END_HSCH5_INT_CLR

Set this bit to clear high speed channel 5 duty change done interrupt.

DUTY_CHNG_END_HSCH6_INT_CLR

Set this bit to clear high speed channel 6 duty change done interrupt.

DUTY_CHNG_END_HSCH7_INT_CLR

Set this bit to clear high speed channel 7 duty change done interrupt.

DUTY_CHNG_END_LSCH0_INT_CLR

Set this bit to clear low speed channel 0 duty change done interrupt.

DUTY_CHNG_END_LSCH1_INT_CLR

Set this bit to clear low speed channel 1 duty change done interrupt.

DUTY_CHNG_END_LSCH2_INT_CLR

Set this bit to clear low speed channel 2 duty change done interrupt.

DUTY_CHNG_END_LSCH3_INT_CLR

Set this bit to clear low speed channel 3 duty change done interrupt.

DUTY_CHNG_END_LSCH4_INT_CLR

Set this bit to clear low speed channel 4 duty change done interrupt.

DUTY_CHNG_END_LSCH5_INT_CLR

Set this bit to clear low speed channel 5 duty change done interrupt.

DUTY_CHNG_END_LSCH6_INT_CLR

Set this bit to clear low speed channel 6 duty change done interrupt.

DUTY_CHNG_END_LSCH7_INT_CLR

Set this bit to clear low speed channel 7 duty change done interrupt.

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